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Take Me To The Gadgetory!
Verilog Based Parallel Port FPGA Interface

Posted January 6, 2012 by Chris

“The main goals of this project was to learn Verilog, to learn about buses and to create a platform for future projects which require the parallelism and/or exact timing of an FPGA combined with the ease of programming of a general purpose PC. An example of a future project is a programmable function generator. At the command of an application running on the PC, the FPGA can generate square waves or PWM signals to feed into a device under test.”

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