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Creating VGA With VHDL
Posted March 27, 2008 by Chris
Once again we’ll take a look at how to generate VGA timing signals. This time with a different approach using the VHDL programming language with the Altera UP2 board. This method is far more flexible and reliable so it is definitely worth a look.
13 Responses to “Creating VGA With VHDL”
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December 25th, 2008 at 6:07 am
The program algorithm is good but the sync. numbers are wrong. It isn’t work with another vga monitors…
December 25th, 2008 at 6:11 am
This was tested on multiple monitors; LCD, CRT & Projecters. It worked on all three. It’s possible that some really picky monitor exists that won’t like the VGA input but I doubt that the software for this is at fault, recheck that you have the pins mapped correctly.
December 26th, 2008 at 8:16 am
I used this data sheet numbers to my sync. file…
http://img229.imageshack.us/img229/204/vgasyncjk7.jpg
But you used different numbers from here and it generally cause a problem…
I use your code and it didn’t work but when i changed the number it worked!
Here this example:
http://img229.imageshack.us/img229/6751/grnt017ob9.jpg
December 2nd, 2013 at 5:22 am
http://www.google.com