Now, let's take a look at the VHDL used to test out this breakout board. We're just blinking LEDs here so nothing too fancy. There's two main parts to the VHDL for this project.
-PWM Generation
-State Machine Shifter
The PWM generation outputs 32 unique values, to a 32 bit std_logic_vector as seen below.
PWM Generation
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IF(pwm_cnt = my_nums(0))THEN pwm_cnt := pwm_cnt + 1; led_buf(0) <= '0'; ELSIF(pwm_cnt = my_nums(1))THEN pwm_cnt := pwm_cnt + 1; led_buf(1) <= '0'; ELSIF(pwm_cnt = my_nums(2))THEN pwm_cnt := pwm_cnt + 1; led_buf(2) <= '0'; ELSIF(pwm_cnt = my_nums(3))THEN pwm_cnt := pwm_cnt + 1; led_buf(3) <= '0'; ... .... .... .. ELSIF(pwm_cnt = my_nums(30))THEN pwm_cnt := pwm_cnt + 1; led_buf(30) <= '0'; ELSIF(pwm_cnt = my_nums(31))THEN pwm_cnt := pwm_cnt + 1; led_buf(31) <= '0'; ELSIF(pwm_cnt = 256)THEN pwm_cnt := 0; led_buf <= (others => '1'); ELSE pwm_cnt := pwm_cnt + 1; END IF;
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The second part of the VHDL code is where we shift the PWM output between LEDs. Depending upon a specific count value, the std_logic_vector created from above, is shifted and set to the output LEDs. This creates a type of rain-drop or waterfall effect as one bright LED flows through the rest of the LEDs. The state machine is really just going through the 32 states over and over again, no tricks.
State Machine Shifter
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case current_state is when S0 => GPIO_0_D(31 downto 0) <= led_buf(31 downto 0); when S1 => GPIO_0_D(31 downto 0) <= led_buf(30 downto 0) & led_buf(31); when S2 => GPIO_0_D(31 downto 0) <= led_buf(29 downto 0) & led_buf(31 downto 30); .. ... ... .. when S29 => GPIO_0_D(31 downto 0) <= led_buf(2 downto 0) & led_buf(31 downto 3); when S30 => GPIO_0_D(31 downto 0) <= led_buf(1 downto 0) & led_buf(31 downto 2); when S31 => GPIO_0_D(31 downto 0) <= led_buf(0) & led_buf(31 downto 1); end case;
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So with that simple VHDL code done, let's compile it and get it into the FPGA to finally test our breakout board.