Course 5: FPGA and CPLD » Lesson 6: Design a Binary Counter

Lesson 1

Introduction to FPGA and CPLD

Lesson 2

Hardware Hello World

Lesson 3

Input and Output

Lesson 4

Combinatorial Logic

Lesson 5

Procedural Logic

Lesson 6

Design a Binary Counter

Lesson 7

Parallel Hardware

Lesson 8

LED Dimming Via PWM

Lesson 9

Design a Handheld POV

Lesson 10

VHDL vs Verilog vs Schematic

Lesson Video

Lesson 6: Design a Binary Timer

We built a binary counter using all hardware components in the Digital Course, but now let’s build a binary counter by programming it using VHDL code.

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