An Introduction To Verilog: Introduction

Project Info
Author: Chris
Difficulty: Medium
Time Invested: 2 Hours

Take a look at the above
tutorials before continuing
to read this tutorial.
           Aside from VHDL, Verilog is the chief language used for programming FPGA & CPLD type devices. Verilog has a familiar syntax style similar to C & Java, however it is still radically different. Everything is still being created from the lowest level possible, from the ground up.
           For this tutorial the CPLD development board that was built previously will be used & modified. Some DIP switches & a (pull-up) resistor array will be added so input can be given. The altera UP1/UP2 development boards can be substituted if you haven't built the CPLD development board.

The CPLD Development Board

The CPLD Development Board

Purpose & Overview of this project
           The goal of this project is to learn the basics of the Verilog programming language. A small & short program will be created that displays output of the numbers 0->8 on the 7-segment display. The number to be displayed will depend upon the DIP switch input. If 0 is input, display 0..if 1, display 1..etc.