An Introduction To Verilog: Data

Data & Observations
           So program the CPLD with the project/program seen on the previous page and your results should be similar to what you see here:

           The program does what it should. If bit 1 is set then the 7-segment display shows 1. If bit 2 then 2 is displayed & so on and so forth up to 8. This is because there are only 8 dip switches, so naturally it is limited.