An Introduction To Verilog: Software

Program Download:

Project Files
Verilog_Project.zip

The Software
           Since Quartus II projects have many, many files I went ahead and just put them all together in a zip file that you can download (to the right). The .pof file is all you really need to program the CPLD.

The Verilog Format
           Verilog uses what are called modules. You can think of modules as similar to main() statements in C or Java. Here is a simple example with a few variable declarations:

-------« Begin Code »-------
//Verilog_Project.v

`timescale 1ns / 1ps //Used For Simulation

module Verilog_Project(DIP_SWITCHES, LEDS);

input  [7:0] DIP_SWITCHES; //Declare 8 Inputs for Dips
output [6:0] LEDS; //Declare 7 Outputs for LEDS
reg    [6:0] LEDS; //Declare 7 Registers for LEDS

endmodule
-------« End Code »-------

           The above program creates a module with 8 inputs, 7 outputs and 7 registers for the outputs (notice how the variable names are also included with the 'module Verilog_Project' statement). This would be the same as a 20-pin IC that does nothing. Why does it do nothing? Easy, we haven't designed any logic circuitry for it yet.

Logic In Verilog
           Now we'll explore how to create the actual logic circuitry, along with how some variables work in Verilog. Let's take a look at the complete program:

-------« Begin Code »-------
//Verilog_Project.v

`timescale 1ns / 1ps //Used For Simulation

module Verilog_Project(DIP_SWITCHES, LEDS);

input   [7:0] DIP_SWITCHES; //Declare 8 Inputs for Dips
output 	[6:0] LEDS; //Declare 7 Outputs for LEDS
reg     [6:0] LEDS; //Declare 7 Registers for LEDS

always
begin
     case(DIP_SWITCHES) //abcdefg - 7 Segment Placement
          8'b00000000 : LEDS = 7'b 1111110;
          8'b00000001 : LEDS = 7'b 0110000;
          8'b00000010 : LEDS = 7'b 1101101;
          8'b00000100 : LEDS = 7'b 1111001;
          8'b00001000 : LEDS = 7'b 0110011;
          8'b00010000 : LEDS = 7'b 1011011;
          8'b00100000 : LEDS = 7'b 1011111;
          8'b01000000 : LEDS = 7'b 1110000;
          8'b10000000 : LEDS = 7'b 1111111;
          default : LEDS = 7'b 00000000;
     endcase
end

endmodule
-------« End Code »-------

           The new modification is an 'always' and a standard case (switch) statement. This means that the switch/case statement should 'always' be used. The way it works is, the 8-bit input from the Dip_Switches is stored in that input variable. Then the input is evaluated through the case/switch statement. If a match is found, then LEDS is given the corresponding value. If no match is found, the default case is used. Enough talk, let's program it!



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