DE0-Nano FPGA Tilt Sensing

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Verilog/Project Archive

The Software
           Now, let's take a look at the verilog used to talk to both the breakout board and the accelerometer. There's two main parts to the Verilog for this project.
    -Gigantic IF Statement
    -Main Verilog Module

           So the verilog written for this project was pulled out of one of the examples given with the DE0-Nano demo board CD-ROM. This was a real time saver as they already wrote up the SPI engine to talk to the accelerometer. It was just a matter of modifying the returned G-Force data to output to the breakout board like I wanted it to. The if statement seen below parses the 1-G data returned for the 32 bits of the 32 LEDs on the breakout board.

Gigantic Multiple IF Statement

------------« Begin Code »------------
assign oLED = int2_count[23] ? (		
					(abs_select_high[3:1] == 3'h0) ? 32'h0003C000 :							
                    (abs_select_high[3:1] == 3'h1) ? (signed_bit?32'hF000:32'h000F0000) :
                    (abs_select_high[3:1] == 3'h2) ? (signed_bit?32'h3C00:32'h003C0000) :
                    (abs_select_high[3:1] == 3'h3) ? (signed_bit?32'h0F00:32'h00F00000) :
                    (abs_select_high[3:1] == 3'h4) ? (signed_bit?32'h03C0:32'h03C00000) :
                    (abs_select_high[3:1] == 3'h5) ? (signed_bit?32'h00F0:32'h0F000000) :
                    (abs_select_high[3:1] == 3'h6) ? (signed_bit?32'h003C:32'h3C000000) :
                    (int2_count[20] ? 8'h0 : 8'hff); // Activity
------------« End Code »------------

           The main verilog file shows you how everything is tied together with 4 modules: a reset, a pll for the spi clock, spi engine and output led data parser.

Main Verilog Module

------------« Begin Code »------------
//	Reset
reset_delay	u_reset_delay	(	

//  PLL            
spipll u_spipll	(
            .c0(spi_clk),      // 2MHz
            .c1(spi_clk_out)); // 2MHz phase shift 

//  Initial Setting and Data Read Back
spi_ee_config u_spi_ee_config (			
//	LED
led_driver u_led_driver	(	
------------« End Code »------------

           Download the full project archive above if you're curious to see all the verilog that goes with this project. Again it wasn't built by me, I just modified a small part of the code to make it talk to my breakout board.