LCD_VGA_TEST Project Status
Project File: LCD_VGA_TEST.ise Implementation State: New (Stopped)
Module Name: Char_ROM
  • Errors:
 
Target Device: xc4vfx12-12ff668
  • Warnings:
 
Product Version:ISE 11.1
  • Routing Results:
 
Design Goal: Balanced
  • Timing Constraints:
 
Design Strategy: Xilinx Default (unlocked)
  • Final Timing Score:
 
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 01/17/2010 - 23:54:43