Altera CPLD's have a max of 100 programming cycles

[Bingo600]

I just discovered this

The MAX II flash has 100 programming cycles (see the Programming/Erasure Specifications in the handbook).

http://www.altera.com/literature/hb/max ... mii5v1.pdf

Pg. 75

Table 5–3. MAX II Device Programming/Erasure Specifications

Parameter Minimum Typical Maximum Unit
Erase and reprogram cycles — — 100 (1) Cycles

Note to Table 5–3:
(1) This specification applies to the UFM and configuration flash memory (CFM) blocks.


WTF !!!!!!

Anyone knows the limits on a 3000 and a 7000 series cpld ?
Edit: Altera also specs them for 100 programming cycles


/Bingo

[ThePyroElectro]

I just discovered this

The MAX II flash has 100 programming cycles (see the Programming/Erasure Specifications in the handbook).

http://www.altera.com/literature/hb/max ... mii5v1.pdf

Pg. 75

Table 5–3. MAX II Device Programming/Erasure Specifications

Parameter Minimum Typical Maximum Unit
Erase and reprogram cycles — — 100 (1) Cycles

Note to Table 5–3:
(1) This specification applies to the UFM and configuration flash memory (CFM) blocks.


WTF !!!!!!

Anyone knows the limits on a 3000 and a 7000 series cpld ?
Edit: Altera also specs them for 100 programming cycles


/Bingo

Hi Bingo,

Yea, that's a specification common with most PLDs. But usually its more like 1,000 than 100. I've been using the same EPM7128 PLD for 5 years and have probably re-imaged it 400-500 times with no performance change (although I do have to try and reprogram it 2-3 times before it takes )

For the Max3000A series we're using (http://www.altera.com/literature/ds/m3000a.pdf):

MAX 3000A devices use CMOS EEPROM cells to implement logic functions. The user–configurable MAX 3000A architecture accommodates a variety of independent combinatorial and sequential logic functions. The devices can be reprogrammed for quick and efficient iterations during design development and debugging cycles, and can be programmed and erased up to 100 times.