Thank you for teking the time to overlook my ansvers , once again.
The course have been "just what i neded" in order to get started with real VHDL on real hardware.
And i have gotten some hands on in both the Quartus and the ISE world.
If anyone else want to get their hands "dirty" , and don't need the 5v tolerance.
Have a look@ebay or AliExpress for some nice offers.
My "best value for the money" is still this : Mini System Development Board ALTERA FPGA CycloneII EP2C5T144 for $13http://www.ebay.com/itm/111242540701
The Max240 was almost the same price, but this one have many more resources , pull-up/downs , 2 PLL's and lot's of other goodies.
The development is the same as with a CPLD , with one extra step ... At the end you have to write the bitfile to the config eeprom on the board , if you want the design to survive a poweroff.
Most FPGA's don't have any built in flash/eeprom. And need to either read the bitfile from an external eeprom to FPGA Ram (done automaticly at powerup) , or have the bitfile programmed to FPGA Ram via jtag.
You'd use jtag during development , and save the final design into the config eeprom when the design is done.
Another bobus is that you don't have any flash wear issues like on a CPLD.
All i can say is : Try to take this course, if you need to get some hands on.
It's rewarding to see your first "blinky".
But if you're comming from a C background like me , don't mistake &
for "and" ... It's actually the "concatenator" function in VHDL. "Think strcat() for std_logic vectors".
And make sure you read up on "Statemachines", if you want to do anything complicated like write to a LCD.
If Chris ever do a Part II , or a section 11..15 i'd love to get some better understanding of :
Synchronizing (flags) between processes. , and Statemachines.
Thanx for your time Chris