Hi there... yep, debugging is apparently quite a challenge! Spent a fair amount of time on this circuit now... still no luck
but I think have isolated the issue (s).
3-8 decoder works OK. Also, I that there is another typo on the schamatic as the 3 enabling pins should be held high/low in the opposite sense (i.e. high should be low etc.). But that's not the problem:
Bit counter... by the way, in the schematic i think it is a decimal counter, I assume no issue, but I'm using a binary counter. The issue I have is that my IC requires that the counter that is not being used (up/down), should be held high, while the other is counting. When I try this, it works. In the video, apparently the IC being used does not require this. The error I get is that it counts in twos, which is consistent with the information in the data sheet. I tried using LS ICs as well, but it didn't work at all.
The second part of the problem is that the NOR gate latch does not seem to drive enough power, it switches, but the current coming out of the latch gets progressively weaker and fades to low. I see in the video there are some resistors going into the NAND gate, (pull/up down?).
Anyway, any thoughts on the above would be gratefully received. I have to say that through the process of tyring to solve this issue, I've learned a great deal. Also, I think that the circuit *might* be simpliefied
... perhaps the use of the NOR gates as inverting input into the latch could be removed, if the inputs from the 3-8 decoder (Y0 and Y7) are simply swapped around...
if you do have any advice on the counter, I will have another bash. Otherwise, I'll give it a week or two and keep going with the other lessons.
All the best!
PS: this query is for the Lesson 11, not the LED chaser. Sorry, you might want to move it.