Search found 75 matches

by Bingo600
Tue Jul 15, 2014 5:24 pm
Forum: Introduction to CPLD and FPGA
Topic: Signals vs Variables
Replies: 2
Views: 9555

Re: Signals vs Variables

Chris I was trying the examples to see if i got a warning about using a signal wo. having it on the sensitivity list. Is the "process parameter list" called a sensisitivity list ? I got a warning from quartus :D , but absolutely nothing from ISE :( And also to prove by the simulation , tha...
by Bingo600
Tue Jul 15, 2014 4:52 pm
Forum: Introduction to CPLD and FPGA
Topic: Altera modelsim under linux mint-17 (and ubuntu 14.04)
Replies: 1
Views: 9044

Altera modelsim under linux mint-17 (and ubuntu 14.04)

While quartus installes nearly ok under linux mint-17 (just a minor challenge with web access). I had to do quite some hocuspokus , to be able to use modelsim. When i started modelsim i got this error in a "window": Error: Error: Can't launch ModelSim-Altera Simulation software -- make sur...
by Bingo600
Sun Jul 13, 2014 1:58 pm
Forum: Introduction to CPLD and FPGA
Topic: Signals vs Variables
Replies: 2
Views: 9555

Signals vs Variables

Hi Chris I was fooling a bit around and stumbled across this "Watch Out" - Signals vs variables: http://esd.cs.ucr.edu/labs/tutorial/index.html#comb_logic Entry : Discussion I: Signal vs. Variable: VHDL code http://esd.cs.ucr.edu/labs/tutorial/sig_var.vhd Simulation http://esd.cs.ucr.edu/l...
by Bingo600
Sun Jul 13, 2014 8:03 am
Forum: Introduction to CPLD and FPGA
Topic: Altera EPM240 Board
Replies: 2
Views: 9141

Re: Altera EPM240 Board

New post due to max 5 url's limit in one post. You can get a board and a blaster from same seller here: http://www.ebay.com/itm/Altera-MAX-II-EPM240-CPLD-development-board-learning-board-breadboard-/310704544415 http://www.ebay.com/itm/altera-Mini-Usb-Blaster-Cable-For-CPLD-FPGA-NIOS-JTAG-Altera-Pro...
by Bingo600
Sun Jul 13, 2014 8:01 am
Forum: Introduction to CPLD and FPGA
Topic: Altera EPM240 Board
Replies: 2
Views: 9141

Altera EPM240 Board

As i thought the "kit" was to expensive in shippping , and that i had the "blaster" and components already. I decided to get this model/board , from Hobby Components UK as the course was almost starting and i couldn't wait for "China" http://www.ebay.com/itm/LC-MAXII-Al...
by Bingo600
Sun Jul 13, 2014 7:37 am
Forum: Introduction to CPLD and FPGA
Topic: MAX3000a reprogrammable only 100 times?
Replies: 2
Views: 9446

Re: MAX3000a reprogrammable only 100 times?

From the max3000a datasheet: The devices can be reprogrammed for quick and efficient iterations during design development and debugging cycles, and can be programmed and erased up to 100 times. So this dev board I bought can be programmed 100 times that's it? I asked the same See ansver here http:/...
by Bingo600
Sat Jul 12, 2014 9:10 pm
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 15722

Re: #3 Input and Output [Post Homework Here]

Edit : On a side note, I received the kit earlier this week , only the be hit with another 18$ customs, on top of the 18$ shipping I had already paid. And the kit was shipped with 10 x 100 ohm resistors instead of 470 ohm resistors... I'm using an EPM240 board See here http://www.pyroelectro.com/fo...
by Bingo600
Sat Jul 12, 2014 6:29 pm
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 15722

Re: #3 Input and Output [Post Homework Here]

There is no place that explicitly says these VCCIO pins go to this lab. Intuition from all the other FPGAs and CPLDs I've used told me. Perhaps they should document it better?! :| I actually think they should. Suppose i want to use the cpld as a levelconverter , and use LAB A for 3v3 , and LAB B fo...
by Bingo600
Sat Jul 12, 2014 6:26 pm
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 15722

Re: #3 Input and Output [Post Homework Here]

I'm not 100% sure what your question here is. Perhaps BIT vs. Standard logic? To start, BIT has only 2 states '0' or '1'. STD_LOGIC has several states U, Z, 0, 1, X....etc and because it is a different VHDL type you can't use a BIT to drive a std_logic signal. However, you can use a BIT to drive a ...
by Bingo600
Sat Jul 12, 2014 9:10 am
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 15722

Re: #3 Input and Output [Post Homework Here]

Hi Chris Here is my homework Btw: Did you mean "top" level" below , and were bitten by a spell checkker ? How do you define a 1 bit logic input in a topic level entity in VHDL? What about a 1 bit logic output? In the port section you define a 1 bit input as: <NAME>: in std_logic; -- s...
by Bingo600
Fri Jul 11, 2014 5:30 am
Forum: Introduction to CPLD and FPGA
Topic: S3E Starterkit
Replies: 6
Views: 11360

Re: S3E Starterkit

There are many ways to use the clock signal in a process, in this course we'll only ever use rising_edge( ... ). The ='1' + 'event method can miss clock changes depending upon your hardware and signal flow. Here's one example - see 'practical example' . Ahh ... This gave a nice explanation http://v...
by Bingo600
Thu Jul 10, 2014 8:55 pm
Forum: Introduction to CPLD and FPGA
Topic: S3E Starterkit
Replies: 6
Views: 11360

Re: S3E Starterkit

I tried a "togle FF" on one of the pushbuttons , works but i see some "bouncing". Had to use signal , as my led_4 <= NOT led_4 gave an error about it was "out" only and could not be read .... Actually makes sense , could i have solved with : led_4 : inout STD_LOGIC; ---...
by Bingo600
Thu Jul 10, 2014 7:27 pm
Forum: Introduction to CPLD and FPGA
Topic: S3E Starterkit
Replies: 6
Views: 11360

Re: S3E Starterkit

Yipieee My first S3E functional project , a "button" blinky. /Bingo Xilinx S3E Starterkit page http://www.xilinx.com/products/boards-and-kits/HW-SPAR3E-SK-US-G.htm Userguide http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Schematic http://www.xilinx.com/support/docume...
by Bingo600
Thu Jul 10, 2014 5:18 pm
Forum: Introduction to CPLD and FPGA
Topic: S3E Starterkit
Replies: 6
Views: 11360

S3E Starterkit

Hi Chris You got me to dig out my S3E Starterkit :D I just loaded the demo succesfully on my Linux Mint-17 Btw: Is it ok to post all this "Non related stuff here" or should i use another sub-forum ? /Bingo iMPACT Version: Oct 13 2013 08:43:40 iMPACT log file Started on Thu Jul 10 18:58:10 ...
by Bingo600
Tue Jul 08, 2014 5:57 am
Forum: Introduction to CPLD and FPGA
Topic: Downloading Quartus II Web Edition
Replies: 3
Views: 9362

Re: Downloading Quartus II Web Edition

I have been trying to download the free web edition the last four days, 4 July through 7 July. All the pages that have links to the software are dead. The easiest link is: http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html I notice others have it. Any ideas? I had no p...

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