Search found 3 matches

by ricochet82
Mon Mar 16, 2015 3:11 pm
Forum: Introduction to CPLD and FPGA
Topic: 7555 Clock Issue in Lesson 6 and 7
Replies: 6
Views: 8345

Re: 7555 Clock Issue in Lesson 6 and 7

I did not. I moved to an Altera MaxII and never experienced any problems with it.
by ricochet82
Thu Jan 22, 2015 10:43 pm
Forum: Introduction to CPLD and FPGA
Topic: 7555 Clock Issue in Lesson 6 and 7
Replies: 6
Views: 8345

Re: 7555 Clock Issue in Lesson 6 and 7

Never did figure it out. Every lesson required 5V on the clock pin to work. I used different CPLDs, 555 timers, power supplies, etc. Completely bizzare. But I've moved on to a MAX II with an onboard clock now.
by ricochet82
Wed Dec 31, 2014 1:07 am
Forum: Introduction to CPLD and FPGA
Topic: 7555 Clock Issue in Lesson 6 and 7
Replies: 6
Views: 8345

7555 Clock Issue in Lesson 6 and 7

Hi. I bought the CPLD kit and have been working thru the tutorials. It has been a great experience. I am having problems with the 7555 clock being detected or maybe processed by the CPLD. I have a scope on the clock output and can see it generates consistent clocking, but the output pins are missing...

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