Search found 6 matches

by Roamin
Mon Jul 14, 2014 12:06 pm
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 10623

Re: #3 Input and Output [Post Homework Here]

I understand that the LEDs will be brighter, I just didn't take time looking at the max 3000a datasheet to see what is the maximum current that can be sourced out of the CPLD. At 470, the LED would light with 3mA , but with 100 ohm the current would be 16mA .. a big difference , although I doubt tha...
by Roamin
Sun Jul 13, 2014 3:45 pm
Forum: Introduction to CPLD and FPGA
Topic: MAX3000a reprogrammable only 100 times?
Replies: 2
Views: 5974

Re: MAX3000a reprogrammable only 100 times?

Hehe Thank you bingo , I should of looked at topics before I posted.
by Roamin
Sat Jul 12, 2014 9:49 pm
Forum: Introduction to CPLD and FPGA
Topic: MAX3000a reprogrammable only 100 times?
Replies: 2
Views: 5974

MAX3000a reprogrammable only 100 times?

From the max3000a datasheet:

The devices can be reprogrammed for quick and efficient iterations
during design development and debugging cycles, and can be
programmed and erased up to 100 times.


So this dev board I bought can be programmed 100 times that's it?
by Roamin
Sat Jul 12, 2014 6:44 pm
Forum: Introduction to CPLD and FPGA
Topic: #3 Input and Output [Post Homework Here]
Replies: 10
Views: 10623

Re: #3 Input and Output [Post Homework Here]

How do you define a 1 bit logic input in a top level entity in VHDL? What about a 1 bit logic output? entity example is port( ENTITY_NAME: in std_logic; ENTITY_NAME2: out std_logic ); end example; *** The only thing confusing since i'm not familiar with vhdl at all is why the second entity declarat...
by Roamin
Sat Jul 12, 2014 6:30 pm
Forum: Introduction to CPLD and FPGA
Topic: #2 Hardware Hello World [Post Homework Here]
Replies: 8
Views: 15783

Re: #2 Hardware Hello World [Post Homework Here]

Why do we need a JTAG programmer in this course? To program the CPLD with the code we compiled. What is the difference between an ‘entity’ and an ‘architecture’ in VHDL? The entity describes the contents of our program and the architecture how different IO interact and are wired together. Looking a...
by Roamin
Mon Jun 30, 2014 11:21 pm
Forum: Introduction to CPLD and FPGA
Topic: #1 The Introduction [Post Homework Here]
Replies: 9
Views: 10322

Re: #1 The Introduction [Post Homework Here]

HOMEWORK QUESTION 1 Why are you taking this course? So I could learn how to design things with CPLD and FPGA. HOMEWORK QUESTION 2 What do you hope to do with the knowledge you gain through this course? I've always been interested in making a dev cart for older consoles and cplds would simplify the ...

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